Date: 27/04/2025

Cadence and TSMC enhance AI and 3D-IC chip design with certified solutions for advanced process technologies

Cadence announced an expanded partnership with TSMC to accelerate 3D-IC and advanced-node technology development, focusing on certified design flows, silicon-proven IP, and ongoing technology collaboration. As a key IP provider for TSMC’s N2P, N5, and N3 process nodes, Cadence delivers AI-driven design solutions for chiplets, SoCs, advanced packaging, and 3D-ICs.

Cadence provides certified tools and IP for TSMC’s N2P and A16 processes, including digital, custom/analog design, and thermal analysis solutions. Its TSMC9000 pre-silicon-certified DDR5 12.8G IP for N2P supports memory-intensive applications, while AI-driven digital design solutions using large language models enhance design flows for future nodes.

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