Date: 16/05/2023

Analog Bits to Demonstrate Working Silicon on TSMC N3E Process at TSMC 2023 North America Technology Symposium

Analog Bits to demonstrate silicon data on the TSMC N3E process. The IPs include Wide Range PLL, PVT Sensor, Droop Detector, Bandgap, Crystal Oscillator pads and Clock Buffers. This development is part of Analog Bits’ committed strategy of broadening portfolio of analog foundation IPs on TSMC’s industry-leading process technologies. Multiple test-chips are planned and being executed to address broader markets of automotive, high performance computing and advanced chiplets.

“Analog Bits continues to lead in advanced mixed signal IP’s by collaborating with TSMC and our lead customers in advanced nodes such as N3E. In each generation we not only add more novelty to our IP offerings but we solve newer and technology centric problems for our customers” said Mahesh Tirupattur, Executive Vice President at Analog Bits. “Power management in lower geometry has become an increasing concern, our new power sensors and regulators help diagnose and take mission critical corrective actions on advanced FinFET processes. We are truly excited and honored to be TSMC’s Open Innovation Platform® (OIP) ecosystem partner and demonstrating working silicon at this Technology Symposium is our commitment to de-risk customer tape-outs and facilitate quicker adoption and volume ramps on advanced technologies.”
See Analog Bits TSMC NC3E Process