Date: 20/11/2012

Course on IC layout design by University of Pune

University of Pune is offering PG diploma course in semiconductor IC layout design from December 3 2012. Chip designers who want to go more physical with the silicon are given a good opportunity.

It is explained in the university web page that: The importance of protection of created chip IPs has thus become a most sought global protection to enable IC designer protect their original woks from unauthorized use. In the country, with the Government initiative of establishing SICLDR (Semiconductor Integrated Circuit Layout Design Registry) to give IP protection to works generated, it also becomes imperative to generate the specialized type of human resource well versed with the IP matters and technical expertise in Layout design fields to support national efforts in Semiconductor IP protection. Presently, there is acute shortage of skilled human resource in the country in the IC layout Design and IP fields which needs to be addressed.

To learn more visit university web page at: http://electronics.unipune.ernet.in/PG_DIP/PGMAIN.html

The last date for receiving applications is extended up to 24th Nov 2012.