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  Date: 05/11/2012

Cadence claims its customers reduced verification time from months to weeks

Cadence Design Systems claims Faraday Technology Corporation, and HiSilicon Technologies Co., Ltd., have reduced their verification schedules from months to weeks and are successfully implementing the most advanced ARM technology using Cadence VIP for AMBA protocols, part of the company’s comprehensive VIP Catalog for SoC verification.

“As the complexity of ARM partners’ designs increases year after year, successfully verifying the performance of the SoCs has become a critical imperative,” said Joe Convey, director of design enablement at ARM. “The comprehensive Cadence verification IP solution for AMBA protocols has enabled our mutual customers to address this challenge while incorporating the latest ARM technology. ARM’s partnership with Cadence helps customers achieve continued success as they roll out next-generation designs incorporating our most advanced AMBA specifications such as AXI4 and AXI Coherency Extensions (ACE).”

“CEVA is the world’s leading licensor of DSP cores and platform solutions for the mobile, digital home, and networking markets. Our proprietary FIC bus delivers the right balance of features needed to deliver optimized designs,” said Richard Kingston, director of marketing and investor relations, CEVA, Inc. “The flexible Cadence VIP for AXI gives us the ability to adapt it to our unique application and exhaustively verify the bus interconnects. This cut our verification effort from 6 months to 3 weeks.”

“HiSilicon is a leader in ASICs and solutions for communication networks and digital media. Delivering advanced multi-core ARM SoCs to our customers requires leading IC design technologies,” said Ting Lei, director of Cloud Computing Department, HiSilicon. “The Cadence VIP for AXI4 and ACE enables us to quickly and efficiently deliver bug-free SoC designs.”

“As a leading ASIC and SIP, silicon intellectual property provider, Faraday has been committed to enabling customers to realize their ideas in silicon in a timely manner. We adopted the Cadence VIP solution for its maturity, full-feature set and support. With the adoption, Faraday can provide customers with comprehensive SoC and IP level verification coverage,” said Ken Liao, RD associate vice president at Faraday.

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