Date: 10/10/2012

Core Logic implements Calypto’s PowerPro tool for advanced RTL power reduction

Calypto Design Systems, Inc. has announced that Core Logic Inc. has adopted PowerPro CG as their chief power optimization tool for designing their complex system-on-chip (SoC) products.

Core Logic develops competitive SoC products and a variety of platforms for mobile, home and automotive applications. Calypto’s PowerPro CG tool was selected by PowerPro CG because of the automation and quality of results. The 30% savings in project time helped them remain competitive while delivering excellent value to their customers.

“We are very proud that Core Logic chose PowerPro as the best tool on the market for reducing power in new and legacy RTL designs," said Shawn McCloud, Vice President of Marketing at Calypto, “because PowerPro has both automatic and guided use modes, it’s the only platform capable of reducing power across the entire SoC thereby cutting both overall project schedule and end product power consumption.”
PowerPro CG automates RTL power optimization:

Based on Calypto’s patented sequential analysis technology, PowerPro CG decreases power by up to 60% with little or no impact on timing or area. PowerPro CG reads in an RTL design and evaluates circuit behavior across multiple clock cycles to recognize sequential clock gating enable conditions. PowerPro CG then generates new low-power RTL that looks indistinguishable to the original RTL with the addition of sequential clock gating logic.

The PowerPro CG-generated RTL is widely verified with Calypto’s SLEC Pro. SLEC Pro is a sequential logic equivalence checking tool that assures functional equivalence between the PowerPro CG-generated RTL and the original RTL.

Source: Calypto Design Systems