Date: 15/07/2012

Open-Silicon’s chip-to-chip I/O IP employed in Netronome’s Flow processor Ics

Netronome has selected Open-Silicon's Interlaken IP core for its next-gen flow processor chips. Interlaken IP from Open-Silicon offers flexible SerDes lane mapping between the logical and physical SerDes lanes. Open-Silicon claims its IP provides the industry's fastest chip-to-chip interface by supporting SerDes data rates up to 28Gbps and multiple data width options. Open-Silicon has sold 35 licenses of this IP core.

"Open-Silicon's Interlaken IP core met the necessary requirements for Netronome's next generation flow processor and was easily integrated into our next-generation processor, even with the customization that we required," said Jim Finnegan, Senior VP Development, Netronome. "Open-Silicon's support for our requirements and customizations has surpassed our expectations."

"We have seen tremendous adoption of Open-Silicon's Interlaken IP core across applications like network switches, routers and storage equipment. Working with Netronome on its next generation flow processors utilizing advanced foundry technology has demonstrated the inherent capability and flexibility of our IP core," said Steve Erickson, VP of IP and Platforms, Open-Silicon.