Date: 17/04/2012

Free access to Atrenta IP kit for two weeks on trial basis

Atrenta Inc is offering free access to its Atrenta IP kit for two weeks on trial basis to SoC VLSI chip design engineers.

The qualified design groups in the US can use Atrenta's IP kit at zero cost from April 16, 2012 to May 31, 2012. By using this kit, "spring cleaning" on the third-party or internally developed IP blocks can be performed. In addition, TSMC uses Atrenta's IP kit to quality soft IP for inclusion in the TSMC 9000 IP library.

"By enabling design groups to develop 'SpyGlass Clean' IP blocks, they can realize more predictable design cycles and faster time to market," said Mike Gianfagna, vice president of marketing at Atrenta. "I am confident that many people will discover substantial opportunities to improve the quality of their IP libraries as a result of the program."

Atrenta's IP kit helps system on chip designers to meet IP re-use challenges, such as design completeness, power consumption, testability, subtle integration risks, managing updates/bug fixes and even finding the right IP.

The user benefits of the Atrenta IP kit are:
· IP quality metrics - to read HTML-based dashboard and datasheet reports
· Automated SpyGlass setup - to use & run
· Comprehensive handoff checks - simulation-synthesis mismatch, electrical, clock domain crossing verification, testability analysis (stuck-at & at-speed), power estimation and verification of timing constraints
· IP packaging support
· Ease of integration into existing design flows

For more details on the IP kit spring cleaning promotion visit: http://www.atrenta.com/springclean/