Date: 30/11/2010

AltaSens employs Berkeley's EDA software to design HD CMOS image sensors

Berkeley Design Automation, Inc., has announced that AltaSens, Inc., has selected the company's AFS Platform for full-circuit post-layout verification, block-level characterization, and device noise analysis of their high-definition (HD) and wide-dynamic-range CMOS image sensors.

"At AltaSens we have significant circuit verification challenges to deliver CMOS image sensors with the highest image quality along with lower noise and lower power in a cost-effective solution," said Manjunath Bhat, VP of Engineering at AltaSens. "With the AFS Platform we can run post-layout verification of our high-performance wide-dynamic-range HD CMOS image sensors with nanometer SPICE accuracy. When running AFS single core we get performance on par with our existing parallel simulator running on 8 cores."

Berkeley claims its Analog FastSPICE Platform is the world's fastest nanometer circuit verification platform for analog, RF, mixed-signal, and custom digital circuits. The AFS Platform delivers foundry-certified nanometer SPICE accuracy 5x-10x faster than any other simulator on a single core and an additional 2x-4x performance with multithreading as per Berkeley.

"We are delighted that AltaSens, a premier supplier of high-definition and wide-dynamic-range CMOS image sensors, has adopted the AFS Platform," said Ravi Subramanian, president and CEO of Berkeley Design Automation. "AltaSens' selection further validates that Berkeley Design Automation is an essential partner to leading edge companies designing high-performance CMOS image sensors across a wide variety of applications."