Date: 23/09/2011

30% productivity boost obtained by Giantec using Cadence Virtuoso flow

Cadence Design Systems, Inc. has announced that Giantec Semiconductor Corp. has adopted the Cadence Virtuoso unified custom/analog (IC6.1) and Encounter unified digital flows for production of its mixed-signal chips to design and tape out a memory product for a low-power micro-controller used in its smart cards, intelligent energy meters and consumer products. The company realized a 30 percent productivity boost in developing its mixed-signal design by using the Cadence Virtuoso unified custom/analog flow, feels Cadence.

"The complexity of today's mixed-signal chips requires a unified approach to design implementation and verification, and Cadence has been working closely with its customers and partners to deliver end-to-end flows for Silicon Realization," said Qi Wang, group director, Solutions Marketing at Cadence. "We continue to see proof points that this approach is critical for success with complex mixed-signal designs, such as the high-performance memory product from Giantec."

"Cadence R&D worked closely with us to address our unique needs, and were able to achieve up to 30 percent productivity improvement by using the Cadence Virtuoso technology," said Leo Li, deputy general manager of design at Giantec. "Deploying Cadence technologies brought us a more complete solution for our mixed-signal designs and a significantly higher level of productivity."

In addition, Giantec standardized on production-proven SKILL-based process design kits (PDKs).