Date: 08/09/2011

Synopsys acquires nSys Design Systems to expand its Verification IP in chip design

Synopsys, Inc. has acquired nSys Design Systems Private Limited (nSys) to expand its capabilities in Verification IP (VIP) technology used in complex systems on chip (SoC) designs.

"Addressing the growing SoC design and verification challenge is a key focus for Synopsys," said Manoj Gandhi, senior vice president and general manager of Synopsys' Verification Group. "With leading SoC designs deploying more complex protocols, VIP is becoming a critical component of the verification environment. Having the nSys team join our current VIP R&D team will help Synopsys accelerate and drive the next level of innovation in VIP technology."

VIP provides functional models of on- and off-chip protocols that verification engineers use to test all of the interfaces on an SoC before manufacturing, enables the engineer to verify how an interface conforms to published standards and also allows the engineer to verify the interactions among various interfaces on an SoC.

Synopsys says the expanded portfolio of VIP from Synopsys will cover all of the widely used interface protocols and many emerging titles, also offer a new protocol compliance test-suite product line. Supported verification methodologies include VMM (verification methodology manual), OVM (open verification methodology) and UVM (universal verification methodology).

"Synopsys has led the industry in SystemVerilog, performance, capacity, methodology and bug-finding technology innovations for the past 15 years," said Atul Bhatia, CEO and founder of nSys Design Systems. "My team and I look forward to joining Synopsys so we can work together to deliver a VIP solution that can address customers' ever-growing SoC verification challenges."