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  Date: 10/08/2011

Sunplus using SpringSoft's ProtoLink Probe Visualizer for verification of Ics

Taiwan based chip designer Sunplus Core Technology Co., Ltd. is using the ProtoLink Probe Visualizer from SpringSoft for verification of surveillance ICs. SpringSoft claims engineers at SpringSoft specializing in programmable platform solutions have realized dramatic gains in debug productivity for 65-nanometer (nm) design prototypes.

Sunplus develops 32-bit embedded processor and VLIW DSP chips for a broad range of multimedia applications. , Sunplus uses FPGA-based prototype boards are used for hardware verification, software integration, and system validation of key IP blocks, design modules and entire chips. By deploying SpringSoft's new Probe Visualizer with off-the-shelf prototype boards, Sunplus engineers are able to increase design visibility and simplify debug of high-speed, low-power chip designs and interfaces for a variety of camera, LCD monitor and microphone/speaker systems, says SpringSoft.

SpringSoft explains that for recent design projects, Probe Visualizer enabled Sunplus engineers to capture around 400 signals over as many as 15 million cycles, add/change more than 10 probes in just minutes saving hours of setup time, and rapidly debug the root cause of design problems at the register transfer level (RTL) with SpringSoft's Verdi Automated Debug System. In addition, engineers no longer had to manually map gate-level code to the RTL source for debug, a process which previously had been both error-prone and time-consuming using debug tools provided by the FPGA vendor.

"Multimedia ICs are pushing the limits of functionality and system integration today to power the next-generation of high quality, intelligent surveillance systems. Because these chips are more complex than ever before, prototype verification is now a critical part of the development methodology," said Henry Lee, CTO from Sunplus Core Technology. "While current FPGA debug solutions do not adequately address the magnitude of this challenge, SpringSoft's ProtoLink approach helps to reduce the verification burden with better visibility and cuts debug time by one third to one week for faster debug turnaround."

"For companies like Sunplus Core Technology, it is imperative that design complexity and debug tools don't get in the way of prototype verification," said Howard Mao, senior director at SpringSoft. "ProtoLink uses intuitive, software-based methods to reduce the time and manpower required to setup, validate and debug designs on FPGA boards, enabling prototype deployment sooner in the verification cycle. We are pleased to see the results SCT engineers have achieved and confident they will continue to reap productivity and time-to-market benefits as they apply ProtoLink Probe to new design projects."

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