Date: 29/06/2011

Evatronix adds USB 2.0 High Speed PHY to its USB IP offerings

Evatronix SA has announced its USB High Speed PHY IP, a mixed signal transceiver macro-cell to complement its suite of USB 2.0 Device and Host controllers. Evatronix USB 2.0 PHY is silicon proven and comply with the UTMI+ specification for High, Full and Low Speeds.

"With the release of our USB 2.0 PHY we passed next significant milestone in our strategy to offer complete front-to-back IP solutions," said Wojciech Sakowski, Evatronix CEO. "With over 10 years of experience in developing and supporting USB 2.0 solutions we can now seamlessly assist our customers in all their development stages from architectural concept to tape-out."

This mixed signal VLSI IP core USBHS-PHY features a Built-in Self Test, self calibration termination and pull-up resistors for seamless operation and offers regular 3.3V analog and 1.8V digital core supplies, both with 10% of voltage tolerance.

Availability:
The Evatronix USBHS-PHY logic macro is available now on the LFoundry 150nm process with the possibility to port it to any technology node from 45 to 180nm.