Date: 23/05/2011

ARM deploys Jasper's tech for validating AMBA based VLSI Ips

Jasper Design Automation has announced that ARM has completed a deployment of Jasper technology and solutions that enhances the validation methodology for ARM AMBA protocol-based processor and system IP. The adoption enables design and validation teams at ARM to address a wide range of verification issues such as the absence of deadlocks, cache coherency, x-propagation detection, control register verification, and protocol certification.

"We selected Jasper's formal verification technology to be deployed across our engineering teams because it addresses the most complex validation issues we face, for example in the coherent subsystem space," said John Goodenough, Vice President of Design Technology and Automation at ARM. "We see a reduction to our risk because Jasper's solutions resolve complex functional bugs and problems that were previously intractable, or were discovered late in the IP development cycle. The usability of the tool makes complex use models of formal technology accessible to design teams, this has been key to driving adoption."

"We are very excited to have this partnership with ARM and to benefit from their technology leadership," said Kathryn Kranen, Jasper's President and CEO. "Many of our users turn to ARM for multicore SoCs that require complex bus protocols. We are confident that the tools, VIP, and methodology that have resulted from our partnership with ARM will be of great value as customers develop their verification flows."