Date: 02/05/2011

HiSilicon cuts standby power of its chips by 40% using Synopsys IC Compiler

Synopsys, Inc. has announced that HiSilicon has reduced stand-by power consumption by up to 40 percent using the latest technology in Synopsys' IC Compiler, a key component of Synopsys' Galaxy Implementation Platform.

"Device performance is our top priority, but in the green networking space, leading-edge performance with the lowest power is a key differentiator," said Yan-Qiu Diao, senior director, research and development, at HiSilicon Technologies Co., Ltd. "IC Compiler's new final-stage leakage recovery capability delivered 40 to 50 percent standby power savings while preserving timing on blocks in our recently taped out designs. We have since deployed final-stage leakage recovery in our production tape-out flow."

"Delivering capabilities that enable designers to stay at the forefront of the power-performance technology curve is a critical driver shaping every release of IC Compiler," said Antun Domic, senior vice president and general manager, Implementation Group at Synopsys. "As a key enabler of energy efficient equipment used in green networks, HiSilicon was pleased to recognize the improvements delivered by IC Compiler's final-stage leakage recovery."