Date: 07/04/2011

Fairchild Semiconductor employs Synopsys' DesignWare USB 2.0 nanoPHY IP

Synopsys, Inc. has announced that Fairchild Semiconductor has achieved first-pass silicon success for its FUSB2500 UTMI+ Low-Pin Interface (ULPI) USB On-The-Go (OTG) transceiver chip utilizing Synopsys' DesignWare USB 2.0 nanoPHY IP. Fairchild selected Synopsys' silicon-proven DesignWare IP because it was low in power and area and offered impressive technical features, including auto-detect functionality and ULPI interface. In addition, the tunability of the PHY enabled Fairchild to easily conduct post-silicon adjustments without incurring the cost of a metal respin, says Synopsys. Fairchild was able to easily integrate the DesignWare USB 2.0 nanoPHY IP within weeks and had convenient access to a knowledgeable, responsive technical support team, adds Synopsys.

As per Synopsys Fairchild using Synopsys' DesignWare USB 2.0 nanoPHY IP enabled Fairchild to successfully launch their leading FUSB2500 transceiver chip into the market on schedule (14 months).

"With a tight development schedule and complex design requirements, we wanted to partner with a trusted and established IP vendor such as Synopsys," said Jerry Johnston, senior director of switch and interface at Fairchild. "The Synopsys' DesignWare USB 2.0 nanoPHY IP offered us a solution that would incorporate all of our design needs and meet our time-to-market window. Synopsys' DesignWare IP is a high-quality product and will continue to be a key element of our future product developments."

"As companies such as Fairchild develop differentiated products that help their customers maintain a competitive edge, they can rely on Synopsys to help provide them with the necessary IP to meet their critical time-to-market window," said John Koeter, vice president of marketing for the Solutions Group at Synopsys. "As a leading provider of USB IP, with over 2,000 design wins and millions of units shipping in volume, Synopsys invests heavily in developing high-quality DesignWare USB IP that delivers key functionality to address our customer's design requirements and reduce integration risk."