Date: 20/02/2011

Mentor offering latest tools for Achronix Semiconductor's 22nm FPGAs

Achronix Semiconductor said Mentor Graphics is the first company in providing advanced synthesis EDA tools for it's Speedster22i Field Programmable Gate Arrays (FPGAs), which are made using Intel's 22nm process technology.

Mentor Graphics is providing logic synthesis and physical synthesis for the Achronix 22nm Speedster22i FPGA platform. Mentor's EDA tool works in conjunction with Achronix CAD Environment
(ACE 4.0) tool set and provide easy physical synthesis capability, mixed language (VHDL and Verilog) and SystemVerilog support. Automatic incremental synthesis is also provided.

Designers are advised to take the advantage of the "assured synthesis mode" and "safer finite state machine" (FSM) capabilities that Precision Advanced RTL Achronix Edition provides when targeting the Speedster22i devices. The safer FSM mode automatically infers a fault tolerant implementation, where a single event upset (SEU) will not interrupt FSM operation. The "assured synthesis mode", available in Precision Advanced RTL Achronix Edition for Speedster22i devices, ensures the synthesized design can be formally verified as is commonly required in safety compliance standards (e.g., DO-254).

"We work closely with the team at Achronix to ensure fully-optimized physical synthesis support for their recently announced 22nm FPGAs," said Daniel Platzker, FPGA synthesis product line director at Mentor. "The combination of Achronix FPGAs and their access to Intel's 22nm process technology was a compelling reason to partner with Achronix."

"Although we are breaking new ground in FPGA performance, density, cost, and features with our Speedster22i family, we are excited to continue to support levels of traditional design methodologies and familiar tools for Speedster22i," said Yousef Khalilollahi, vice president of marketing at Achronix Semiconductor. "This agreement with Mentor arms designers of the world's most advanced FPGAs with state of the art tools."