Date: 20/02/2011

LSI preintegrating Zarlink's timing synch in Axxia comm processors

LSI Corporation and Zarlink Semiconductor are collaborating in pre-integrating Zarlink's Timing over Packet expertise with the LSI Axxia Communication Processor family, speeding time to market and simplifying integration for networking OEMs.

The combined offering provide timing synchronization information for 3G and LTE base stations and other mobile network infrastructure, enabling TDM infrastructure to be replaced with low-cost Ethernet-based backhaul.

"Wireless networks are increasingly pushing the bandwidth envelope as consumers continue to use their smartphones and connected devices to watch videos, browse the Internet and interact with social media applications," said Tareq Bustami, multicore communication processor product line director, LSI. "By integrating the Axxia Communication Processor family and Zarlink timing synchronization, we are enabling service providers to deploy Ethernet backhaul to efficiently deliver data-intensive applications while reducing operating costs."

The release states the LSI and Zarlink silicon are a complete timing solution that is compliant with the IEEE 1588-2008 standard and has been pre-tested for interoperability. When used with the newly announced Axxia ACP3423 communication processor, the solutions also support Synchronous Ethernet (SyncE).

"Zarlink's ZL3034x family of Timing over Packet devices work seamlessly with the LSI Axxia Communication Processor family to offer a scalable solution for wireless networks," said Jeremy Lewis, timing product line manager, Zarlink. "Our Timing over Packet solutions are key technologies that enable service providers to integrate packet-based networks into their existing infrastructure."

The solutions are now available in sample quantities to networking OEMs.