Date: 06/02/2011

Automatic DRC repair is 7X faster by new Synopsys IC Compiler

Synopsys, Inc. has released the IC Compiler, a key component of the Galaxy Implementation Platform. The IC Compiler 2010.12 release makes automatic DRC repair up to 7X faster with performance improvements for multicorner/multimode (MCMM) designs bringing the total for the year to a nearly 4X speed-up, says Synopsys. Additionally, IC Compiler 2010.12 introduces technology targeted for final top-level design closure.

"With our 28 nanometer Stratix V FPGAs, we have pushed the boundaries of performance, density and integration," said Brad Howe, vice president of IC engineering at Altera Corporation. "IC Compiler's key technologies such as concurrent multicorner/multimode (MCMM) optimization and In-Design automatic DRC repair were a strong enabler for us to achieve our performance and area targets, allowing us to meet our tight design schedule."

This release also suppose to deliver up to 10 percent lower out-of-the-box clock tree power and a 10 percent reduction in total buffer count for reduced dynamic power consumption. Additional QoR improvements include advances in clock feasibility, signal integrity and electro-migration closure.

Other features include:

1. Improve runtime performance with 1.5X speed-up along with a 20 percent reduction in memory.
2. On-Demand Loading technology (ODL), first introduced to significantly reduce time-to-floorplan creation, has been extended to top-level closure to accelerate turnaround-time by 2X to 3X.
3. Using ODL, concurrent optimization of top and block interfaces enables blocks to be adjusted transparently, reducing the need for costly feedback loops between top-level and block-level implementation.
4. IC Compiler In-Design physical verification technology reduces design iterations by enabling signoff accurate DRC analysis and repair during design.
5. Incremental revalidation of repair regions and improved fix rates result in up to 7X faster automatic DRC repair times.

"The latest IC Compiler release demonstrates our strong focus on technology innovation that delivers compelling customer value," said Antun Domic, senior vice president and general manager, Synopsys Implementation Group. "In the high-end FPGA market where time to market is a key differentiator, IC Compiler In-Design technology has successfully addressed one of Altera's key design productivity concerns."