Date: 02/06/2011

Synopysys invite Cadence and Mentor' tools users to migrate to its VCS

Synopsys, Inc. has announced migration program for Cadence Incisive and Mentor Graphics Questa users to migrate to the Synopsys VCS functional verification.

"Network security consistently imposes more design complexity, which necessitates a high-performance, efficient, and scalable verification solution, especially given our mounting time-to-market pressures," said Barun Kar, senior director of hardware engineering at Palo Alto Networks. "We migrated to VCS because it offered a significant performance advantage over other solutions, and it proved a good fit for our growth plans as we move to larger designs, targeted for both high-end FPGAs and ASICs."

"We migrated our verification environment to VCS in 2009," said Rich Schofield, principal verification engineer at Acme Packet, the leading provider of session border controllers. "Our Net-Net portfolio of hardware platforms utilizes custom high speed communication ICs, and we require a high performance verification environment with robust SystemVerilog support. After evaluating offerings from several vendors, we chose Synopsys VCS."

Synopsys is offering technical services, training, and expert verification support. As part of the program, users can expect services such as assistance with OVM to UVM testbench migration, migration of scripts, verification IPs, and regression environment, as well as training for efficient deployment of VCS and UVM methodology, says Synopsys.

"AMD has used Synopsys VCS with OVM since 2008," said Warren Stapleton, senior fellow at AMD. "The VCS SystemVerilog implementation is mature and we are happy with our decision to use the OVM framework with VCS, as we have seen improved productivity and user advantages. We look forward to moving to UVM to achieve the same advantages, along with the strength of it being an Accellera standard."