Date: 19/01/2011

Sidense Memory IP Qualified in 180nm, 130nm and 65nm GLOBALFOUNDRIES Processes

Sidense Corp. has announced its OTP (one-time programmable) SiPROM products qualified in three GLOBALFOUNDRIES CMOS processes - 180nm, 130nm and 65nm. Sidense OTP memory IP core is used in semiconductor chips such as USB and touch screen controllers, silicon clocks, power management chips, HDMI controllers and configurable storage.

Sidense says it's SiPROM, ULP and SLP families of OTP macros are available for top-tier silicon foundry and IDM processes in several configurations ranging from 16 bits up to 512 Kbits, supporting word widths up to 128 bits. Customers designing chips with Sidense memory for GLOBAL FOUNDRIES processes are using the Company's OTP macros in densities from 64 bits to 128 Kbits.

"We are seeing a rapidly increasing demand for qualified OTP memory IP over a wide range of process nodes," said Todd Humes, Vice President of R&D at Sidense. "Through close cooperation with GLOBALFOUNDRIES we are able to supply our customers with a broad range of OTP macros at several popular nodes to meet their embedded non-volatile storage requirements and help give them a competitive edge."