Date: 19/10/2010

Synopsys announces 23rd EDA Interoperability Forum

Synopsys, Inc. announced its 23rd Electronic Design Automation (EDA) Interoperability Forum will expand its focus to include system-level design interoperability topics, in addition to verification and analog design updates. A special live Conversation Central session will focus on the importance of system-level design tools interoperability in the wireless supply chain, with Synopsys host Karen Bartleson interviewing Will Strauss, principal analyst at Forward Concepts, and Jose Corleto, sr. director, engineering at Qualcomm, Inc.

Who should attend this VLSI event: The event is recommended for EDA tool developers, IC design and verification engineers, IP providers and members of the press to discuss the industry-critical topics of interoperability and standards.

Topic of Focus: The October 2010 Forum focuses on the latest developments in EDA interoperability, with sessions dedicated to:
System-Level Design:
Hear about latest trends in System-level Design ROI and the importance of System-Level Design tool interoperability to the wireless industry supply chain.

The Interoperable Process Design Kit Libraries (IPL) Alliance:
Find out about the newest IPL Constraint Working Group and get an update on the successful launch of IPL 1.0, the industry's first interoperable design kit standard.

Verification:
Presentations from key companies involved in register verification interoperability and case studies of how register maps are shared and verified.

When and Where:
Thursday, October 21, 2010. The Forum is open to all who wish to attend at no charge. Lunch and a light breakfast are included.
The Oracle Conference Center at Agnews Historic Park in Santa Clara, Calif. from 9:30 am to 4:30pm.