Date: 19/10/2010

Cadence and Xilinx release new Xilinx IP Ecosystem microsite for FPGA designers

Cadence Design Systems and Xilinx has introduce new Xilinx IP Ecosystem microsite, a site meant to increase FPGA and ASIC designers' visibility to the latest IP supporting the Xilinx programmable platform.

"This new microsite enables our existing FPGA customers, as well as ASIC developers looking at alternative solutions, to find the key IP they need to develop their designs on the Xilinx programmable platform," said Dave Tokic, senior director of Partner Ecosystems and Alliances at Xilinx. "With a worldwide audience of more than 30,000 registered users, ChipEstimate.com is a great venue for both the ASIC and FPGA communities to learn about the latest IP available on Xilinx FPGAs."

"This microsite is an excellent example of the types of innovative collaboration Cadence is entering as part of the EDA360 vision," said Adam Traidman, general manager of Chip Planning Solutions at Cadence. "We understand that only by joining with other industry leaders can we provide the types of efficiencies our customers need to streamline the design process and hit their productivity and profitability targets."

The url is http://www.chipestimate.com/xilinx