Date: 21/09/2010

HSPICE Precision Parallel Technology from Synopsys increases simlutaion speed upto 7 times

Synopsys has unveiled the new HSPICE Precision Parallel (HPP) multi-threading technology that Synopsys claims delivers up to 7X simulation speed-up for complex analog and mixed-signal designs. The HSPICE 2010 solution also includes enhanced convergence algorithms, advanced analog analysis features and foundry-qualified support for process design kits (PDKs) that extend HSPICE gold-standard accuracy to the verification of complex circuits such as phase-locked loops, SERDES, data converters, high-precision custom digital and power management. With HSPICE 2010, design teams can accelerate verification of their analog circuits across process variation corners and reduce the risk of silicon respins, says Synopsys.

"We rely on HSPICE to simulate our analog designs with sophisticated digital control logic functions," said Xiaowei Wang, director of analog design at HiSilicon. "Using the latest HSPICE Precision Parallel technology on a data converter, we obtained a 7X speed-up on eight cores, reducing a multiple-day simulation to about 8 hours. HPP enables our analog engineers to improve productivity by simulating multiple iterations of the designs in a single day."

HSPICE is a commercial circuit simulator that introduces full multi-threading capability. HPP combines an adaptive sub-matrix technology with optimized cache utilization and device model evaluation to obtain high performance on multicore machines.

"We evaluated HSPICE Precision Parallel technology to speed up our multimillion-element complex clock mesh network simulation," said Antonio Todesco, SMTS design engineer, Graphics Silicon Engineering group at Advanced Micro Devices. "HSPICE Precision Parallel technology allowed us to achieve one-day turnaround time for ECO, extraction and simulation while using less memory and delivered the timing resolution needed to support clock mesh circuit integrity."

"With the increasing use of digitally-assisted analog circuits in SoCs, designers are demanding innovation in circuit simulation to significantly speed up transient simulation and to take advantage of the latest multicore compute resources," said Paul Lo, senior vice president and general manager, Synopsys Analog and Mixed-Signal Group. "We continue to invest in new HSPICE technology to improve simulation productivity for the HSPICE user community."

Availability:
The HSPICE Precision Parallel technology is in limited customer availability and will be generally available in the December 2010 release.