Date: 14/07/2010

ASML announces broad adoptation of its lithography products

ASML has announced the broad customer adoption of its holistic lithography products at SEMICON West. ASML says that these products optimize semiconductor scanner performance and provide a fast start to chip production. All of ASML's scanners are now sold with one or more holistic lithography components. Holistic lithography provides a way to shrink within these margins to continue Moore's Law.

ASML had earlier at SEMICON West 2009 introduced holistic lithography suite of products. Holistic lithography integrates computational lithography, wafer lithography and process control to optimize production tolerances and reduce "time to money" for chip makers. ASML says that all of their customers have adopted multiple products from the holistic product portfolio into research & development (R&D) as well as volume manufacturing. Products like Source Mask Optimization (SMO), FlexRay, LithoTuner, Baseliner and YieldStar are in use worldwide.

ASML also offers holistic lithography as an integrated package called Eclipse, which is tailored to a specific customer, node and application. A significant number of ASML's advanced customers have adopted an integrated Eclipse package.

"Most chip makers have found that for current and future process nodes, independent optimization of process steps is insufficient. The entire litho process must be integrated and co-optimized for the best performance. Eclipse extends the capabilities of their hardware and helps them to produce chips with smaller geometries, "said Bert Koek, senior vice president, applications product group at ASML. "With detailed knowledge of our scanner characteristics and interfaces we can work closely with our customers to integrate computational lithography solutions during R&D, and implement customized improvement targets during manufacturing."

ASML says that STMicroelectronics will incorporate Eclipse in conjunction with a TWINSCAN NXT:1950i scanner for their 28-nanometer (nm) node. The key deliverables of the package are on-product specifications for both overlay and critical dimension uniformity (CDU). The 28-nm Eclipse package for ST includes a full range of products from ASML, including scanner tuning products, immersion scanner application, stabilization and conditioning; and the ASML applications support to achieve the specified targets. Preparations for Eclipse at the next node have started with a feasibility study on 20-nm critical layer printing options.

"To optimize development cycle times and manufacturing solutions for 28-nm and beyond, ST is working closely with ASML to define targets, processes and design parameters," said Joel Hartmann, Technology R&D Group VP and General Manager Advanced CMOS, Derivatives and eNVM technology, STMicroelectronics, at Crolles, France. "ASML's Eclipse packages include application products, custom project deliverables and application support that enable joint process optimization."