Date: 08/07/2010

TSMC adopts advanced clock tool from Azuro for hardening of embedded CPU cores

TSMC has adopted Azuro's Rubix clock concurrent optimization capability for hardening of embedded CPU cores.

The release states the rising on-chip-variation and rising clock latencies cause design timing to diverge after clock tree synthesis at the process node even if tight skews are achieved. Clock concurrent optimization is a new approach to clock tree synthesis (CTS), which builds clocks directly to deliver good timing and power rather than simply to deliver tight skews. Global trade-offs can be made between fixing timing problems with clock skew and fixing timing problems with logic sizing or placement.

"Azuro and TSMC share a common belief that at advanced process nodes there is currently a gap between what the silicon can offer and what design flows can deliver," said Paul Cunningham, CEO of Azuro. "Replacing clock tree synthesis with clock concurrent optimization is a vital change our industry needs to make to close the productivity gap at advanced process nodes. We are delighted that TSMC has adopted Rubix for hardening of their embedded CPU cores."

Rubix is a placement, sizing, and useful skew-based clock tree synthesis tool for digital standard cell-based chip designs. According to Azuro it increases clock frequencies by up to 25%, reduces leakage power by up to 30%, and accelerates timing closure in the back end of the design flow by up to two months.

For more information visit: www.azuro.com.