Date: 08/06/2010

Actel provides free access to its VLSI IP libraries

Actel is providing free access to IP libraries in its Libero Gold edition and RTL-source IP libraries in its Libero Platinum edition. Actel is providing access to more than fifty IP cores included in the comprehensive software toolset.

The Libero Gold Edition supports Actel FPGAs up to 1.5 million system gates, includes obfuscated versions of the Actel IP cores that can be used in designs but cannot be modified. The Libero Platinum edition supports Actel FPGA devices above 1.5 million system gates, such as AGLE3000, M1AGLE3000, A3PE3000, M1A3PE3000, A3PE3000L, RT3PE3000L, RTAX2000S, RTAX4000S, RTAX2000D, RTAX4000D and AX2000.

RTL source code for the following broad selection of Actel IP cores can be accessed through Actel's SmartDesign tool:

CoreAHB
CoreAHB2APB
CoreAHBLITE
CoreAHBNVM
CoreAHBSRAM
CoreAI
CoreAPB
CoreFROM
CoreGPIO
CoreINTERRUPT
CoreMEMCTRL
CoreMBX
CoreMP7BRIDGE
CoreREMAP
CoreAHB
CoreAHB2APB
CoreAHBLITE
CoreQEI
CoreAHBNVM
CoreAHBSRAM
CoreAI
CoreAPB
CoreFROM
CoreGPIO
CoreINTERRUPT
CoreMEMCTRL
CoreMBX
CoreMP7BRIDGE
CoreREMAP
CoreTIMER
CoreUARTAPB
CoreWATCHDOG
Core16550
Core3DES
Core8051s
CoreAES128
CoreDES
Core3DES
CoreAI
CoreAPB
CoreCFI
CoreDDR
CoreFMEE
CoreI2C
CorePWM
CoreRSENC
CoreSDR
CoreSPI
CoreUART
CoreUART_APB
CoreABC
CoreLPC

For more information visit: www.actel.com/products/software/libero/default.aspx