Date: 31/05/2010

Increasing role of IP design reuse in semiconductor chip design industry

Now the cost of SoC class semiconductor chip is pegged at close to 100 million US$. Achieving first time silicon success is not easy. To keep the cost down and quality up and develop the chip faster, the trick is to reuse the IP or to the buy the readymade IP available from IP vendors. Example if a VLSI design engineer has to put a USB3.0 interface in the chip, it takes more cost and time to design the block from scratch rather than buying from IP vendor.

But the problem with 3rd party IP is the trust on its quality. The 3rd party IP need to work smoothly and fit into application requirements of the chip. Here the best sellers are silicon proven IPs, which is approved, by semiconductor fabs as well as standard bodies.

Some of the popular off the shelf IP cores in the market include processors such ARM, Intel 8051, and MIPS, communication interfaces such as PCIe, Ethernet, USB, SATA or MIPI, memory interfaces such as DDR3/DDR2, flash memory interface, memory controllers, complex mathematical algorithm handling digital logic and also lot of analog and power management IP cores.

The other advantages of going for design reuse of either your own or 3rd party IPs are,

Saves from hiring expensive engineers with domain expertise
Saves the effort from keeping the own IP updated and to the latest market requirements
The 3rd party or own IP is much more mature than own design
Save extra effort in verification

The only point is how to ensure 3rd party IP is of good quality. Quality of IP can be gauged in similar way how we buy any stuff in the market. Achieved business and tech features of the IPs comes handy in deciding the IP. If the IP is from startup brought at low price, it's a business risk. If it's successful, the benefit goes more to the IP vendor. But if carefully selected and evaluated the IPs from startups/small companies, the chip design cost will come down drastically. There are lot of new IP developers popped up all over world with more from India, Taiwan and China; offering IPs at very low price compared to well established players. In fact some of the VLSI design service companies in India develop the IP which can be owned by the customer. So there leaves a lot of options with different risk levels.

Now the EDA tools vendors also are becoming IP vendors or IP Integrators. Synopsys has significant readymade IP as good as any leading pure Semiconductor IP vendors. Cadence has launched a new program called EDA 360 where it is providing open integration platform with integration-optimized IP and on-demand integration services. IBM is the Cadence partner in developing IPs.

This trend defines VLSI design activity into two types; they are pure IP developer/seller and IP integrator with more design reuse option. However the big chipmakers are both IP developers as well as IP integrators, which gives strategic advantage over startups and small companies.