Date: 21/12/2009

UMC presented new hybrid high-k/metal gate tech for 28nm at 2009 IEDM

UMC presented a paper on unique 'hybrid' high-k/metal-gate (HK/MG) technology approach for 28nm at 2009 International Electron Device Meeting (IEDM).

The method combines the 'gate-first' process strength for nMOS with 'gate-last' features for pMOS to realize up to 30% enhanced transistor performance compared to a gate-first only process.

"The spirit of innovation is always a key factor when developing advanced technologies," said Mr. S.C. Chien, vice president of Advanced Technology Development at UMC. "This published work demonstrates UMC's ability to conceive and develop alternative solution paths, leveraging in-depth learning of existing HK/MG process options to respond to today's rising demand for cutting-edge products and applications."

For gate-first, the HK/MG is inserted before the gate is patterned (formed). For 'gate-last' or 'replacement metal gate', MG is 'filled in' after a polysilicon dummy gate is formed and then removed.

The UMC's advanced technology development efforts are taking place at UMC's 300mm Fab and R&D complex in Tainan, Taiwan.