Date: 02/10/2009

'Common Platform Technology' qualifies Synopsys IC Validator for 32-nm design rule

Synopsys has announced that the 'Common Platform Technology', a unique collaboration between IBM, Chartered Semiconductor and Samsung Electronics, has qualified IC Validator for 32 nm process design rule checking on common platform technology. IC Validator, the new addition to the Galaxy Implementation Platform, is a full signoff DRC/LVS solution. This qualification enables Common Platform to deploy IC Validator into production use at 32nm of in-design physical verification in conjunction with the IC Compiler place and route solution.

"We believe that in-design physical verification is essential to significantly reduce physical verification turnaround time given the complexities at emerging nodes," said Henry Law, vice president, design services division for Chartered, on behalf of the Common Platform alliance companies. "Architected for 45nm and below process nodes, IC Validator offers a highly flexible programming language that makes runset creation at these complex nodes easy and concise. Our qualification of IC Validator confirmed its signoff accuracy and productivity benefits of in-design physical verification. Given the observed benefits, we are committed to qualifying IC Validator for the Common Platform 28nm process node."

"Common Platform technology companies have always been at the forefront in defining high-productivity flows for advanced processes," said Bijan Kiani, vice president of product marketing, design and manufacturing products at Synopsys. "This qualification marks an important milestone in supporting leading-edge technology from the Common Platform alliance and will bring IC Validator's unique value proposition to our mutual customers and partners. We look forward to our continued collaboration towards the 28-nm qualification."

For more details visit www.synopsys.com