Date: 30/10/2012

PLL clock generator family feature less than 200 fs RMS phase jitter

Micrel has announced configurable dual PLL clock generator family called SM803xxx family featuring less than 200 femto-second (fs) RMS phase jitter with twelve differential or single-end outputs for frequencies up to 850MHz. FLEX2 supports 10/40/100 Gigabit Ethernet, SONET/SDH, CPRI/OBSAI, Fibre Channel, SAS/SATA, and high speed clocking for FPGA and SerDes. Factory configurable using fuse-based one-time programmable (OTP) memory, FLEX2 shortens prototyping time and end system design cycle.

"Following through with Micrel’s strategy to expand our Clock and Timing products with high performance and flexible products, we are excited to announce the Clockworks FLEX2 family," stated Rami Kanama, vice president for the timing and communications product group, Micrel. "As the industry’s lowest jitter custom-configurable dual PLL clock synthesizer, the SM803xxx enhances frequency flexibility and quickly delivers a fully customized clocking solution. With its ultra-low jitter and integrated fan-out capability, FLEX2 improves system performance and lowers both BER and SNR, offering customers a much needed system jitter budget for high speed applications."

The SM803xxx product is currently available in production quantities and sampling to customers.