Date: 10/10/2012

Octal ultrasound receiver from ADI feature 5-Gbps JESD204B interface

Analog Devices, Inc. (ADI) has introduced the octal ultrasound receiver to feature an on-chip JESD204B serial interface. By integrating the 5-Gbps JESD204B interface, ADI’s AD9671 octal receiver decreases ultrasound system I/O data routing by almost 80 percent compared to other data interface standards. The resulting savings meet the needs of manufacturers designing small, high-performance ultrasound systems by simplifying ultrasound equipment board design while meeting industry demand for higher data rates, larger channel counts and greater image resolution.

The AD9671 receiver conditions eight channels of data from RF to a baseband frequency, decreasing the processing load on the system FPGA (field-programmable gate array). The AD9671 integrates a low-noise amplifier, variable gain amplifier, anti-aliasing filter, and a 14-bit A/D converter with high sample rate (125 MSPS) and SNR (signal-to-noise ratio) performance (75 dB) for enhanced ultrasound image quality. The new octal receiver is designed for mid- to high-end portable and cart-based ultrasound systems.

“By introducing the first octal ultrasound receiver with a multi-gigabit, serial data link, we are enabling ultrasound equipment designers to shrink the number of interconnects between their data converters and FPGAs,” said Pat O’Doherty, vice president, Healthcare segment, Analog Devices. “By incorporating the JESD204B serial interface, the AD9671 receiver not only simplifies PCB design and debug, it allows manufacturers to continue lowering design costs and reducing system size while maintaining excellent overall system performance.”

AD9671 Octal ultrasound receiver with digital I/Q demodulation:
The AD9671 integrates a digital I/Q demodulator, programmable-oscillator and 16-tap FIR (finite-impulse response) decimation filter to decrease FPGA data bandwidth requirements, while additionally combining multiple channels into a single CML (current-mode logic) data lane. The AD9671 offers a continuous wave (CW) processing path with an analog I/Q demodulator that has harmonic rejection to the 13th order, which permits designers to lessen the number of filter components to lower system cost, reduce design complexity and improve signal sensitivity. The CW-mode output dynamic range is more than 160 dBc/ vHz per channel.
Key features:
1. 5-Gbps serial JESD204B CML interface
2. Digital I/Q demodulator with programmable oscillator
3. FIR decimation filter
a. 16 taps per decimation factor
b. Maximum decimation of 32
4. 14-bit, 125-MSPS A/D converter
a. SNR: 75 dB
5. 8-channel LNA, VGA, AAF, ADC
6. Low power:
a. 130-mW/channel@ 40 MSPS in TGC (time gain compensation) mode
b. 55 mW/channel in CW mode
7. Noise: 0.78 nV/vHz typical at 5 MHz(gain = 21.3 dB)
8. Harmonic rejection to 13th order on CW-Doppler signals

Product Sample availability Full production Price each per 1k units Packaging
AD9671 October 2012 December 2012 $75.00 144-ball 10 x 10 mm BGA

Download data sheet: http://www.analog.com/AD9671

Source: Analog Devices