Date: 28/08/2012

PCI Express 3.0 software from Agilent for calibrating received signal

Agilent Technologies Inc. has made available PCI Express 3.0 software for calibrating the stressed voltage and stressed receiver eye using an Agilent J-BERT bit error-ratio tester, an Agilent 90000A-, Q- or X-Series oscilloscope, an Agilent pulse function generator and Agilent PCI Express 3.0 calibration test channels.

"PCI-SIG values the efforts put forth by companies such as Agilent that make it easier for our members to perform exhaustive testing of the receivers on their PCIe 3.0-compliant devices," said Al Yanes, PCI-SIG president and chairman. "An important objective of the PCI-SIG is achieving full interoperability at 8 GT/s, and validation and delivery of fully compliant PCIe 3.0 receivers and transmitters is critical to achieving that objective."

The software option:
Provides automated remote control of the J-BERT N4903B and the 81150A pulse generator
Automates the calibration of stressed jitter and voltage eyes for PCIe 3.0 receiver testing
Uses PCI-SIG-recommended techniques for minimizing the impact of system noise on eye closure.

"Agilent provides the broadest array of engineering tools for PCI Express development," said Sigi Gross, vice president of Agilent's Electronic Test Division. "Our expertise in receiver and transmitter test allows us to be the first vendor to offer tools that integrate the functions of BERTs, oscilloscopes and signal generators to help our customers easily accomplish their receiver testing requirements for PCI Express 3.0 devices and systems."

"As digital speeds for PCI Express reach 8 GT/s today and 16 GT/s tomorrow, Agilent is delivering oscilloscope bandwidth and performance that will meet the requirements of this and many other standards," said Jay Alexander, vice president of Agilent's Oscilloscope Products Division. "By engineering a software tool that integrates the core functionality of different Agilent products to achieve a single test objective, Agilent helps customers save crucial time in their receiver validation and enables them to release their products to market faster with fewer first silicon defects."