Date: 18/06/2012

64 core SoC from Toshiba for embedded system applications

Toshiba has developed low-power, many-core System-on-a-Chip (SoC) for embedded system applications such as automotive products and digital consumer products.

Details of the SoC and its development will be presented at the 2012 IEEE Symposia on VLSI Technology and Circuits in Honolulu, Hawaii.

Toshiba's many-core SoC consumes low power with a cluster size of 84 mm2, making it suitable for embedded applications.

The new many-core SoC employs tree-based network-on-chip (NoC) architecture and highly efficient embedded processor cores. Integrated with image recognition hardware accelerators, the new many-core SoC secures 1.5 tera operations per second at 333MHz, a processing rate 14 times faster than that of its eight-processor multi-core predecessor, as per Toshiba.

The new SoC uses low power technologies such as multi-level power gating, clock gating and Toshiba's proprietary low power data-mapping flip-flop circuit. Toshiba says advancing the fabrication process to 40nm secures a 40 to 50% boost in power efficiency over the company's previous multi-core chip, manufactured with 65nm process.

Toshiba plans to apply the many-core SoC and its related technologies to high performance over-HD (high definition) resolution image processing and recognition.