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  Date: 15/06/2012

Quartus II Software v12.0 released from Altera - Supports 28-nm FPGAs

Altera Corporation has released the latest version of its Quartus II development software for FPGA design. Quartus II software version 12.0 features advantages such as up to 4X faster compile times for high-performance 28-nm designs, broadened 28-nm device support, initial support for Altera's SoC FPGAs, enhanced Qsys system integration and DSP Builder tools, and improved intellectual property (IP) core offerings.

Altera claims that the Quartus II software v12.0 maintains the industry's fastest compile times, allowing customers to focus design team resources on innovating their designs while maximizing designer productivity. Stratix V FPGA users will achieve on average a 35 percent reduction in compile times, while Cyclone V and Arria V FPGAs users will see on average a 25 percent reduction in compile times with this software version, as compared to the company's previous software release.

The software broadens its support for 28-nm FPGAs which feature a hard dual-core ARM Cortex-A9 processor.

New support includes:
1. Programming support for Stratix V GX and Stratix V GS production devices
I. 5SGXA7, 5SGXA4, 5SGXA3 and 5SGXA5
II. 5SGSD5 and 5SGSD4
2. Programming support for Stratix V GT FPGA
I. 5SGTC5
3. Device support for the largest Arria V GT FPGA
I. 5AGTD7 with final pin-out
4. Device support for Cyclone V FPGAs
I. 5CEA7 and 5CGTD7
II. 5CEA9, 5CGXC9 and 5CGTD9
5. Compilation support for Cyclone V SX SoC FPGA
I. 5CSXFC6D6
Altera has added support for the ARM AMBA AXI-3 interface in its Qsys system integration tool, providing the flexibility to connect IP cores and IP sub-systems based on different standard interfaces.

Other features:
1. Digital signal processing (DSP) support with DSP Builder v12.0-Communicates with DDR memories from MATLAB via System Console and uses new floating-point functions.
2. Video and image processing (VIP) suite and video interface IP-For video processing applications through an updated Scaler II MegaCore function with edge-adaptive algorithm and new Avalon-Streaming (Avalon-ST) Video Monitor and Trace System IP cores.
3. Transceiver design and verification-Updated transceiver toolkit support for Arria V FPGAs and support for higher speed transceiver data rates (up to 14.1 Gbps in Stratix V FPGAs).

The subscription edition and the free Web edition of Quartus II software version 12.0 are now available for download. Subscribers receive Quartus II software, the ModelSim-Altera Starter edition and a full license to the IP Base Suite, which includes 15 of Altera's IP (DSP and memory) cores. The annual software subscription is $2,995 for a node-locked PC license and is available for purchase at Altera's eStore.

For additional information: www.altera.com/q2whatsnew

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