Date: 10/06/2012

Lattice sampling ECP4 FPGA to select customers

Lattice Semiconductor Corporation has announced that it has begun shipping the next generation LatticeECP4 FPGA family to select customers. The new LatticeECP4 FPGA family offers the portfolio of mid-range devices under 200K LUTs, with innovations such as 6G SERDES, powerful DSP blocks and built-in hard IP-based communication blocks.

The LatticeECP4-190 is the highest density device in the family. The device features 183K LUTs, 480 double data rate DSP multipliers (18x18), 5.8 Mbits of memory and twelve 6 Gbps SERDES channels. The device is suitable for a broad range of cost- and power-sensitive wireless, wireline, video and computing applications.

The LatticeECP4-190 FPGA offers high-speed CPRI and SRIO 2.1 interfaces and double data rate digital signal processing (DSP) blocks for building heterogeneous wireless networks. The LatticeECP4 FPGAs facilitate rapid construction of the latest 3G/4G metro basestations, small cell stations, pico stations, microwave and millimeter-wave backhaul links. The LatticeECP4-190 FPGA also provides wireline access developers with 36 embedded clock and data recovery (CDR) circuits to build high port density switches and routers.

"With the silicon release of our LatticeECP4-190 devices, our customers can implement even more complex designs for wireless base stations and backhaul, wireline access, video and display applications and still benefit from the device's low power and economy," said Sean Riley, Lattice corporate vice president and general manager, Infrastructure Business Unit. "The next generation LatticeECP4 FPGA family brings premium features to infrastructure customers while maintaining industry-leading low power and low cost."

Lattice has released three flip-chip packages for the LatticeECP4-190 (676, 900 and 1152 pins)
The LatticeECP4-190 device is priced at $60 in 100K unit for delivery in second half of 2013.
The device is available in the 676fcBGA package.