Date: 24/05/2012

'ideas2silicon' SoCs and Super SoCs design services platform launched by Uniquify

Uniquify has launched ideas2silicon, a new design services platform that spans chip specification and design through volume delivery of packaged and tested parts.

ideas2silicon turns the model upside down by offering faster turnaround, lower costs and a transparent business model that gives project teams complete visibility into the cost structure.

"The traditional 'turnkey' model is not working and we're doing something about it," says Josh Lee, chief executive officer and founder of Uniquify, provider of ASIC/SoC design and manufacturing services and patented low-power double data rate (DDR) subsystem IP developer. "Projects teams have been frustrated with the classic model, as it effectively locks them into an expensive business relationship that is hard to change."

The foundation of ideas2silicon is the Perseus, a proprietary design framework on complex designs and forms. It provides a methodology for managing the design and closure of complex system-on-chip (SoC) and Super SoC (SSoC) designs with multiple processors, special-purpose processing engines, on-chip networks, memories and different peripheral and I/O functions.

ideas2silicon delivers complex ASIC, SoC and SSoC designs. A key component is an automated capability for rapidly selecting, qualifying and integrating IP blocks that form the backbone of a new design.

The IP services range from specification and architectural design, field programmable gate array (FPGA) prototyping, register transfer level (RTL) design and verification through complete physical design and verification.

Uniquify's design team has expertise in advanced 65-, 40- and 28-nanometer process technologies from foundries including TSMC, Samsung, GLOBALFOUNDRIES and SMIC.

Uniquify partners with EDA suppliers, including Cadence, Mentor and Synopsys, for the automation software needed to support these complex designs within Perseus.

Uniquify has developed a portfolio of patented, high-performance DDR memory subsystems that can be applied for rapid implementation to address the need for tested and pre-qualified IP.

Uniquify developed high-performance and silicon-proven self-calibrating logic and dynamic self-calibrating logic (DSCL) IP for DDR memory subsystems to solve both static and dynamic variation problems during system operation. This patented technology includes controllers, PHY and I/O for use on a variety of applications.