Date: 18/05/2012

VLSI Design: Software bridges the cross-over points between analog and digital design

Analog and mixed signal VLSI design tool vendor Tanner EDA and VHDL, Verilog and SystemVerilog simulation software expert Aldec have collaborated to deliver an integrated co-simulation solution for analog and mixed-signal (A/MS) design. Tanner EDA's new HiPer Simulation A/MS offers their T-Spice analog design capture and simulation tool together with Aldec's Riviera-PRO mixed language digital simulator. The solution allows both analog and digital semiconductor chip designers to seamlessly resolve A/MS verification problems from one cohesive, integrated platform.

Tanner EDA explains: creating and verifying A/MS integrated circuits is a challenge. Spice-based simulation provides the accuracy needed for the analog design, but is too slow to handle the digital part. Event-driven digital simulation provides the necessary speed to simulate the digital portions, but fails when dealing with the analog parts. As A/MS designs grow in complexity and business pressures force design teams to shorten time to market and reduce re-spins, a new solution for mixed analog and digital co-simulation, with a robust feature set and an affordable price, is needed.

HiPer Simulation A/MS helps to eliminate co-simulation complexities by automatically recognizing the analog and digital portions of a design and enabling designers to easily verify interfaces between analog and digital blocks, according to Tanner EDA. The integrated solution provides accurate, high-performance co-simulation that allows designers to verify the most complex A/MS designs with ease and confidence, and within budget, claims Tanner EDA.

"Tanner EDA's focus on the price-performance ratio extends to bringing innovations to our customers from well-regarded partners with a similar concern for total cost of ownership," said Greg Lebsack, president of Tanner EDA. "HiPer Simulation A/MS -- based on mature, industry proven products -- provides customers with a highly productive and practical A/MS tool suite that bridges the cross-over points between analog and digital design."

"The synergies we have with Tanner EDA span both technology and business," said Dr. Stanley Hyduke, president and CEO for Aldec. "Both companies have delivered top-notch products and relentless customer service for the last 20 plus years and this collaborative A/MS solution will prove again why both Aldec and Tanner EDA continue to see growth and innovation in our respective areas of expertise."

Availability: HiPer Simulation A/MS is available on both Windows and Linux. The new product includes Tanner EDA's design entry and simulation tool suite for analog design (S-Edit for schematic capture, T-Spice for circuit simulation (with Verilog-A modeling), and W-Edit for waveform probing) and Riviera-PRO (TE) - the Tanner Edition of mixed VHDL and Verilog simulation from Aldec. For additional detail, click here to replay a joint Tanner EDA-Aldec webinar entitled "Bridging Analog and Digital Verification."

Both companies demonstrating the integrated product in their respective booths at DAC 2012 - Tanner EDA in Booth #1126 and Aldec in Booth #2126.