Date: 22/04/2012
New Questa platform 10.1 released by Mentor Graphics
Mentor Graphics Corp has announced the 10.1 release of the Questa functional verification platform, an integrated solution that transforms the functional verification of system-on-chip and FPGA designs. This release supports the universal verification methodology (UVM), accelerates coverage closure and provides better simulation and verification.
"The Questa functional verification platform contains an integrated set of leading-edge technologies that address the major verification challenges faced by today's complex SoC, ASIC, and FPGA designs," said John Lenyo, vice president and general manager of the design verification technology division of Mentor Graphics. "Design teams are looking for solutions that increase total verification throughput, improve verification quality, speed up adoption of new methodologies and effectively analyze verification results. This release of the Questa platform, combined with our comprehensive verification academy website, brings these powerful verification solutions and "know-how" to verification teams around the globe."
Key features
1. Simulation and verification performance: The Questa 10.1 release introduces new Questa multi-core simulation technology. Questa Multi-Core is targeted for large designs that can take advantage of modern compute systems by partitioning the design to run on multiple CPUs or computers in parallel, while maintaining a single database for debug and coverage closure.
2. Support for UVM: The Questa 10.1 platform comes with a UVM-aware debug solution that gives engineers essential information about the operation of their dynamic, class-based testbenches in the familiar context of source code and waveform viewing that RTL designers have used for years. With additional UVM-specific views, Questa 10.1 shows the component hierarchy, class definition tree, and other UVM settings specific to a testbench to make it easier to understand the operation of the verification environment.
3. Coverage closure solutions: Mentor manages the verification process and achieving coverage closure.
4. The Questa verification manager is a suite of tools that helps manage verification processes, tools and data. A unified coverage database (UCDB) reduces verification file storage needs and improve analysis and query times. For process and tool management, Questa 10.1 now includes a new run manager control panel that makes it easier to control, configure, analyze and automate regression environments.
5. To accelerate coverage closure, Questa inFact's intelligent testbench automation generates non-redundant stimulus. Users can automatically import their existing SystemVerilog constraints and covergroups.
6. Low power verification: Questa 10.1 supports for UPF 2.0, as well as multiple new static and dynamic power checks used for both register transfer level (RTL) and gate level power verification.
7. Questa verification platform: The Questa platform weaves together the verification tools with advanced methodologies.