Date: 03/04/2012

Latest Synplify FPGA synthesis tool from Synopsys accelerate runtime by 30%

Synopsys has released its new Synplify Pro and Synplify Premier FPGA synthesis tools which can run synthesis algorithms by up to 30 percent faster.

The key features of new version includes:
The Synplify Premier software is enhanced with a new continue-on-error feature to address FPGA designers' need for fast turnaround time by enabling them to generate a report and fix all errors resulting from missing or incorrect design definitions at the end of the hardware description language (HDL) compilation step rather than incrementally fixing an error and rerunning the compile step.
The new Synplify Premier features selective triple modular redundancy (TMR), fault-tolerant error correcting code (ECC) memories and Hamming-3 encoding for detection and correction of soft errors.
The Synplify synthesis tool has a datapath latch conversion feature to automatically convert an ASIC design to an FPGA implementation, making it possible for the designer to use a single set of source files to implement the FPGA-based prototype.
Can infer error correcting memory and automatically make the proper connections to take advantage of ECC memories offered by FPGA vendors.
Supports fault-tolerant finite-state machine (FSM) implementation using Hamming-3 encoding to automatically detect and correct single bit errors that might occur in the registers of an FSM.
Allows designers to address radiation effects such as single event upsets (SEUs) through multiple error mitigation techniques including localized and selective TMR implementation.

"Our customers continue to face shorter time-to-market windows, making it essential they complete their designs faster," said Alex Grbic, director of marketing for software, DSP and IP at Altera. "The runtime improvement in Synopsys' Synplify products combined with the compile time advantage we have in our Quartus II software provide our mutual customers a productivity edge that allows them to reduce overall implementation time when designing for our latest 28-nm FPGAs."

"Designs targeted for safety critical applications such as those used in defense, aerospace, medical, industrial control and automotive markets require the highest level of quality and reliability," said Tom Feist, Senior Director of Design Methodology Marketing at Xilinx. "The new 2012.03 Synplify Premier product infers Xilinx error correcting memory and automatically makes the connections to the design. This is especially useful for high reliability applications where errors cannot be tolerated."

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