Date: 04/03/2012

Latest IC design verification IP from Synopsys entirely written in SystemVerilog

Synopsys, Inc.has unveiled its Discovery Verification IP (VIP) family based on its VIPER architecture. This VIP is written entirely in SystemVerilog with native support for the UVM (Universal Verification Methodology), VMM (Verification Methodology Manual) and OVM (Open Verification Methodology) methods. The Discovery VIP family includes Protocol Analyzer, a unique protocol-aware debug environment. Discovery VIP supports all major simulators and offers up to four times (4X) higher performance than other commercial VIP, as well as configuration, coverage and test-development capabilities to improve IP and SoC designers' productivity, claims Synopsys.

"We have been users of Synopsys VIP for several years now and are very pleased with its quality, performance, features and capabilities," said Bruce Fishbein, vice president of IC engineering, Networking and Communications Division, at Cavium, Inc. "As our designs and our verification environments reach new levels of complexity, the vision and roadmap behind the Discovery VIP architecture will enable us to address the next wave of SoC verification challenges."

VIP provides functional models of on- and off-chip protocols like ARM AMBA, PCI Express, USB, MIPI, HDMI and Ethernet. Verification engineers use these models to test all SoC interfaces before manufacturing, enabling them to verify whether an interface conforms to published standards.

Unlike other commercially available VIP, Discovery VIP is written entirely in SystemVerilog without any wrappers or methodology extensions around an original implementation in a different language.

"In response to the need for greater performance and power efficiency we are seeing broad and rapid industry adoption of AMBA 4 AXI4 and ACE protocols to support coherent, heterogeneous, multi-processor SoCs," said William Orme, strategic marketing manager, processor division, ARM. "We support Synopsys' development of verification IP for AMBA4 AXI4 and ACE protocols and have provided reference models for compliance and interoperability testing. We look forward to continuing to work closely with Synopsys to address the needs of our mutual customers."

"Protocol verification has become a critical part of SoC verification, with major implications for cost and time to market," said Manoj Gandhi, senior vice president and general manager of the Synopsys Verification Group. "Synopsys identified the need for a next generation of verification IP to improve debug, performance and ease of SoC integration. The launch of our next-generation VIP architecture is critical for the industry to address growing SoC verification challenges."

Synopsys VIP is available for protocols including USB 3.0, ARM AMBA AXI3, AXI4, ACE, HDMI, MIPI (CSI-2, DSI, HSI, etc.), Ethernet 40G/100G, PCI Express, SATA, OCP, and many others. See the complete list at http://www.synopsys.com/VIP