Date: 26/08/2011

High-resolution video processing IP cores Video SoC designs

Silicon Image has announced its new family of high-quality cineramIC video processing IP cores targeted for integration into digital video system-on-chip (SoC) designs to deliver optimal image quality for consumer electronics (CE), professional video processing, surveillance and medical imaging devices.

Chip designers are offered with below choice of processing blocks:
Adaptive Scaler - Scales video to higher/lower resolutions while preserving image detail and suppressing ringing artifacts in graphics content.
Mosquito Noise Reduction - Removes mosquito noise present along object edges in highly compressed digital images.
Detail and Edge Enhancement - Sharpens image edge boundaries and improves fine detail in an image.
Video Smoothing - Removes the jagged (rough, irregular) edges in an image which are caused by digital compression, scaling artifacts, poor-quality deinterlacing, or resolution limitations in digital sampling of an image.
Precision Deinterlacer - Converts interlaced video into the progressive image quality demanded by today's high-resolution displays by eliminating many of the artifacts found in common deinterlacers to produce a smooth image free of artifacts.
Progressive Reprocessing (PReP) - Recovers the original interlace signal from a progressive video data that has been previously deinterlaced by a poor quality deinterlacer to help significantly improve picture quality provided by the Precision Deinterlacer.

"The new cineramIC video processing IP cores bolster Silicon Image's IP product portfolio of high-quality, high-resolution video and image solutions," said Ron Richter, senior director of worldwide IP core licensing at Silicon Image, Inc. "By integrating these IP cores, SoC device manufacturers will be able to provide their customers with the most advanced video processing techniques for optimum video quality on HD DTVs and displays."

For more information visit: www.siliconimage.com