Date: 08/05/2011

Cadence's tool suite ensures tight handshake between vlsi board and sofware dev

Cadence Design Systems, Inc. has announced software suite of its smoothly connected tools/platforms supporting hardware-software co-design from architectural-level development through to prototyping. The full suite of hardware-software development platforms targets complete chain of electronic product design.

The Cadence System Development Suite features two new products-the Cadence Rapid Prototyping Platform and the Cadence Virtual System Platform-and connects them to the Cadence Palladium XP Verification Computing Platform and Cadence Incisive Verification Platform. The integrated flow across these different platforms is designed to be smooth and easy. Migration from emulation to FPGA based prototypes is made simple. The Cadence Rapid Prototyping Platform includes off-the-shelf FPGA boards with capacities of up to 30 million ASIC gates, supports standard ASIC flows and provides fast design mapping, multi-FPGA automatic partitioning and FPGA place & route tools.

The Cadence Virtual System Platform delivers an integrated and synchronized multi-core hardware software debug environment, with multiple views of hardware, software, memories and registers enabling system analysis and tight handshake between hardware and software teams. Combined with the Cadence Incisive Verification Platform, it delivers mixed TLM/RTL unified simulation and common metric-driven verification methodology, reducing the risk of discrepancies between the abstracted hardware model and the eventual RTL. Cadence says it accelerates the process of platform creation through automation by enabling customers to quickly build highly configurable transaction-level non-processors hardware models and utilize high-performance processor models delivered by ARM and other third parties.

Cadence makes the flow from one quadrant to another quadrant of EDA tool-setup smoothly by tightly integrating its set of tools for chip, board and embedded software design, the technique what it now brands as EDA360 vision. In fact this is the trend in the EDA domain both by user preference as well as vendor development.

Praises and comments by experts:
"We have used Cadence emulation products for many years, including the Cadence Verification Computing Platform, for system validation on our most important projects, such as NVIDIA Tegra processors," said Narendra Konda, director of engineering at NVIDIA. "But with increased software content and multi-core designs, today's electronics systems have become substantially more complex and require a more robust set of technologies to meet time to market and ensure quality. Accordingly, we have deployed the broader Cadence System Development Suite, with elements such as the Cadence Rapid Prototyping Platform offering immediate incremental value."

"In order to streamline the system development process of ARM-based designs, we have collaborated with Cadence extensively over the last 10 years. The new Cadence approach of delivering a single environment for virtual prototyping, emulation and FPGA-based prototyping is clearly a need for future complex designs," said Joe Convey, director of Design Enablement at ARM. "Continuing our collaboration to link the Cadence System Development Suite with ARM IP will enable our mutual customers with a pathway to product success."

Cadence Palladium XP Verification Computing Platform, Cadence Incisive Verification Platform and Cadence Rapid Prototyping Platform are made immediately available but the Cadence Virtual System Platform, currently in use with early adopters and widely available later 2011.