Date: 03/05/2011

New Cadence Allegro 16.5 release strengthens connectivity

Cadence Design Systems, Inc. has introduced the latest version of its Allegro PCB and IC packaging technology. New technologies include advanced miniaturization capabilities, power delivery network analysis, DDR3 design-in kit, bolstered co-design features, and flexible team-design enablement to address global designer productivity. The company also announced that the Allegro 16.5 technology will be available through product configuration that enables users to access advanced features on-demand for specific design tasks, thus optimizing total cost-of-ownership.

"Coming on the first anniversary of the announcement of the EDA360 vision, our Allegro 16.5 release strengthens the connection between Silicon, SoC and System Realization-the three key tenets of EDA360," said John Bruggeman, senior vice president and CMO of Cadence. "We have leveraged our leadership in PCB and IC package design to drive a true end-to-end flow across all product creation disciplines, which speeds time to market while improving productivity and profitability for our customers."

The new Allegro 16.5 features and capabilities are aimed at easing the path to co-design and analysis between engineers involved in Silicon, SoC, and System Realization, and enabling more predictable and efficient design flows that deliver higher-quality end products.