Date: 21/04/2011

VeriSilicon selects Verdi automated Debug system from SpringSoft

SpringSoft, Inc. has announced that VeriSilicon Holdings Co. Ltd. has selected itsVerdi Automated Debug System as the standard debug platform. SpringSoft says with the ability to visualize the hierarchy and relationship of a design from multiple views, VeriSilicon engineers are able to quickly locate problems and trace root causes, reducing debug cycles by 20 percent on average across its broad range of design applications.

"As a leading design service company, VeriSilicon is continuously honing and improving our design and verification flow. Verdi is a very important tool in the flow that enables us to deliver the best-in-class design service quality and enhance our overall verification competency," commented James Jiang, corporate vice president of engineering for VeriSilicon.

Verdi Automated Debug System cuts debug time in half by automating the process of comprehending how complex VLSI IC and SoC designs work, particularly unfamiliar legacy design elements or third-party intellectual property, claims SpringSoft. The full-featured system automates behavior tracing over time with its unique analysis engines, provides a powerful set of design views to visualize and help analyze cause-and-effect relationships, and uses patented techniques to reveal the functional operation and interaction between the design, assertions and system testbench, adds SpringSoft.

"Adoption of Verdi as the standard debug platform by industry leaders such as VeriSilicon, particularly in China's fast-growing IC marketplace, underscores Verdi's strong position in the verification domain. We expect the close cooperation between VeriSilicon and SpringSoft to bring even more value over time to our common customers in this region and across the globe," said David Lin, vice president of Asia sales for SpringSoft.