Date: 21/04/2011

Synopsys' CustomExplorer Ultra for mixed-signal verification of SoC

Synopsys, Inc. has made available the CustomExplorer Ultra mixed-signal verification environment as part of Synopsys' Discovery Verification Platform. CustomExplorer Ultra in combination with Synopsys' CustomSim/VCS mixed-signal verification solution provides design teams with mixed-signal simulation and regression management environment for complex system-on-chip (SoC) verification.

"With the increasing number of mixed-signal circuits in SoCs, verification teams are demanding a high-productivity environment to significantly reduce the complexity of mixed-signal verification tasks," said Paul Lo, senior vice president and general manager, Synopsys Analog/Mixed-Signal Group. "CustomExplorer Ultra complements our strong CustomSim/VCS mixed-signal verification solution to provide design teams with a scalable solution to tackle the verification challenges of complex mixed-signal SoCs."

The highlighted features and advantages include:
Multiple testbench and corner configurations can easily be set up, and simulation jobs are automatically queued and submitted to the server farm.
Simulation job distribution and monitoring gives real-time status of multiple jobs running on multiple machines, providing quick feedback if problems are detected during simulation.
Simulation results are collected, processed and presented in a spreadsheet-style display, providing an easy-to-read visual summary of the verification tests.
Pass/fail results are indicated in the display, and the results can be filtered by design, design variables, equation results, or equation expressions.
The unique Waveform Compare technology in CustomExplorer Ultra can be used to compare simulation results to a known-good waveform, saving considerable analysis time.
The CustomExplorer Ultra debug environment offers complete SPICE linting, design hierarchy file browsing and signal tracing, as well as cross-probing between netlists, waveforms and interactively-generated connection visualization for rapid debugging.
CustomExplorer Ultra is integrated with Custom WaveView (included), enabling waveform cross-probing and sophisticated waveform measurements.
Netlists can be imported from a variety of heterogeneous sources and assembled into a single simulation netlist for verification using the configuration manager; SPICE, Verilog, Verilog-A, Verilog-AMS and SystemVerilog formats are supported.

The CustomExplorer Ultra mixed-signal verification environment is available immediately.

Synopsys to host a webinar entitled "Advanced Regression and Analysis for Mixed-Signal Verification Using CustomExplorer Ultra" premiering at 10:00 a.m. on Wednesday, May 4, 2011. This webinar will demonstrate how CustomExplorer Ultra enables high verification productivity for complex SoCs using advanced strategies that surpass traditional verification approaches. People interested in viewing this webinar can register online. All Synopsys webinars are listed on the web site at www.synopsys.com/Company/Pages/WebinarTopics.aspx.