Date: 22/03/2011

10/12 bit 250 MSPS ADC and 14-bit 400 MSPS DAC VLSI IP from Synopsys

Synopsys Inc. has released its new DesignWare ADC and DAC IP for designing chips for the applications such as WiFi, WiMAX, LTE, and digital TV reception. Synopsys says this new data converter IP consumes 50% less power compared to other similar IPs and can process signal bandwidth beyond 100 MHz. This VLSI IP core is designed for very-high data rate standards such as WiFi (802.11ac) and home networking (G.hn), and for the direct conversion of high intermediate frequency (IF) signals.

The new IP includes:
10-bit and 12-bit pipeline ADCs running up to 250 MSPS in single channel and dual channel configurations.
14-bit current steering DACs running up to 400 MSPS in single channel and dual channel configurations.