Date: 28/02/2011

Synopsys' DesignWare data converter IP for SMIC 's 65nm process

VLSI software and IP core vendor Synopsys has made available its silicon-proven DesignWare Data Converter IP for Semiconductor Manufacturing International Corporation (SMIC) 's popular 65-nanometer (nm) Low Leakage (LL) process technology. Synopsys said it is the first IP provider to offer a comprehensive portfolio of high-performance data converter IP solutions consisting of analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) in this high density, low leakage process technology. The DesignWare Data Converter IP is targeted at battery powered broadband wireless communications (WiFi802.11n, LTE, WiMAX) and digital TV reception (CMMB, DVB) applications.

"The combination of Synopsys' silicon-proven DesignWare Data Converter IP and SMIC's low-leakage 65-nanometer process technology enables our mutual customers to meet their specific application requirements and integrate advanced functionality into their SoCs," said Chris Chi, Senior Vice President and Chief Business Officer of SMIC. "Synopsys' strong application expertise in broadband wireless communications and digital TV make them a trusted IP provider and valued partner. As SMIC's business continues to expand, we look forward to further developing our synergistic relationship with Synopsys to meet the increasing requirements of our mutual customers."

The new DesignWare Data Converter IP solutions for the SMIC 65-nm LL process consist of ADCs and DACs for broadband wireless communications, including high-speed ADCs and DACs for the receive and transmit path and efficient auxiliary converters for general purpose applications, including:
10-bit 80 MSPS Dual pipeline ADC
10/8-bit 2 MSPS SAR ADC with differential 8:1 input mux
12-bit 160 MSPS Current Steering IQDAC
11-bit 20 MSPS General Purpose DAC


"By working closely with SMIC to make the DesignWare Data Converter IP available in SMIC's 65-nanometer low leakage process, we continue to provide designers with the optimized IP they need for their specific applications in their required foundry processes," said John Koeter, senior vice president of marketing for IP and Systems at Synopsys. "Achieving first-pass silicon success with our data converter IP demonstrates the robustness of Synopsys' design and verification processes as well as the scalability of the architectures, enabling designers using advanced process technologies to lower their integration risk and meet their time-to-market schedules."