Date: 03/11/2010

Synopsys unveils DesignWare STAR ECC IP for high level of protection

Synopsys, Inc. has unveiled the DesignWare STAR ECC (Self-Test and Repair Error Correcting Codes) IP as a part of its DesignWare STAR Memory System product family. The new DesignWare STAR ECC IP enables designers to achieve a high level of protection against transient errors such as soft errors, that occur in emerging semiconductor process technologies. This IP is targeted at applications such as automotive, aerospace and high-end computing,.

The DesignWare STAR ECC IP is designed to provide optimal performance of partial word writes and high error detection/correction capability in multi-bit upsets and random bit errors.

"As SoCs manufactured in advanced technology nodes become more susceptible to environmental influences, there is an ongoing need to reduce soft error rates," said John Koeter, vice president of marketing for the Solutions Group at Synopsys. "The DesignWare STAR ECC IP enables designers to easily select the required fault tolerance level to protect against these transient errors. By using Synopsys' DesignWare STAR ECC IP, designers can achieve their high performance and yield requirements with less risk and improved time-to-market."

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