Date: 27/10/2010

Digital Core Design launches new faster core for its Dhrystone 2.1 benchmark program

Digital Core Design has unveiled an accelerated version of the DP8051 core for running its Dhrystone 2.1 benchmark program. The new core is reported to be up to 15.55 times faster than the previously used 80C51 at the same frequency.

"Based on our talented engineering DP8051 has been significantly improved in its performance. It provides up to 0.14632 DMIPS/MHz (VAX MIPS), which sets it at the top comparing to all competitors. If we also take into account its small gate-count size then it makes DP8051 perfect choice for all customers requiring 8051 based solutions" - said Jacek Hanke DCD's president. DP8051 core has long 9 years ASIC history, and its current generation was build as an enhancement of its predecessor. Such way of the DP8051 enhancing made it the most reliable and stable product.

DP8051XP family provides real-time JTAG based DoCD debugger and is fully user configurable. This Core family is available as VERILOG Source code, VHDL Source code and FPGA Netlist formats for immediate purchase from Digital Core Design.