Date: 21/09/2010
New 150 MHz ARM Cortex-M3 based MCU from NXP Semiconductor
NXP Semiconductors has released a ARM Cortex-M3 microcontroller. The LPC1800 is optimized for low power operation at frequencies up to150MHz. The MCU uses a flexible dual-bank 256-bit wide Flash memories for concurrent write/read operations, allowing "golden copy" preservation and prevention of reprogramming mishaps, or simply used as a single bank of memory. The LPC1800 also features two new innovative peripherals: a flexible quad-SPI interface and a state configurable timer subsystem.
"The LPC1800 sets a new performance benchmark for ARM Cortex-M3 microcontrollers," said Geoff Lees, vice president and general manager, microcontroller product line, NXP Semiconductors. "What makes the LPC1800 unique is NXP's innovation in reliable, high performance memory architecture and system peripherals."
The LPC1800 is designed using NXP's ultra low-leakage 90nm process technology. The LPC1800 offers on-chip SRAM for a Cortex-M3 with up to 200KB provided in multiple banks, each with separate bus master access for higher throughput and individual power-down control for low power operation. The dual-bank 1MB Flash architecture provides reliable in-application re-programming. This MCU provides conectivity with SPI and quad-SPI. High-speed interfacing from quad-lane SPI memories at up to 80 Mbps per lane. The LPC1800's State Configurable Timer Subsystem comprises of a timer array with a state machine enabling complex functionality such as event controlled PWM waveform generation, ADC synchronization and dead time control. The LPC1800 can create user-defined wave-forms and control signals for applications such as including power conversion, lighting and motor applications.
Additional peripherals available on the LPC1800 include two HS USB controllers, an on-chip HS PHY, a 10/100T Ethernet controller with hardware enabled TCP/IP checksum calculation, a high-resolution color LCD controller, and AES decryption including two 128-bit secure OTP memories for key storage.
LPC1800 Standard features include 32 KB ROM containing boot code and on-chip software drivers, eight-channel General-Purpose DMA (GPDMA) controller, two 10-bit ADCs and 10-bit DAC with data conversion rate of 400k samples/s, a motor Control PWM and Quadrature Encoder Interface, 4 UARTs, 2 Fast-mode Plus I2C, I2S, 2 SSP/SPI, Smart card interface, 4 timers, windowed watchdog timer, an alarm timer, an ultra-low power RTC with 256 bytes of battery powered backup registers and up to 80 general purpose I/O pins.
Package: 144-pin and 208-pin LQFP packages and 100-pin, 180-pin and 256-pin BGA packages.
Availability:
Flash-based LPC1800: Sampling now.
Flashless LPC18x0 parts, featuring larger on-chip SRAM: Sampling now and will be available through distribution in December.